Tilera, perhaps the last of the first crop of massively multicore startups, gets funding from Broadcom. From the EE Times: Broadcom takes stake in multicore pioneer Tilera

From the Inquirer: March is the month of multi-core CPUs.

A good article on ARM from EE Times Asia: ARM invasion moves past mobile market. Interesting that ARM ships 90 cores per second. But when it comes to multicore:

Many SoC designers—and ARM licensees—are struggling on one issue in today’s environment of multiple GPUs and MPUs: Is there a compiler that can automatically spread load energy efficiently across those multiple cores in a SoC?

ARM’s answer is, no, not yet.

Acknowledging that “huge software challenges are coming,” Inglis said, “Many SoC vendors are, just about now, running into an ‘oops’ phase.” He warned that the industry is still in a very early stage of using multiple cores for their SoCs. “Real SoCs based on multiple cores to run real applications are just about to come out now. They are being debugged. Many engineers are suddenly asking, ‘how do you run all these tasks in so many cores?’”

From PC World: Intel 48-Core “Single-Chip Cloud Computer” Improves Power Efficiency This just as the Larabee CPU +GPU is being canceled.

From Cnet: Intel: Initial Larrabee graphics chip canceled This was the INtel CPU + GPU device.

Google has announced a new concurrent language called Go. It’s been described as Python meets C++.

From The Register: The multicore future, and how to survive it.

From the EE Times, a new Sun (Oracle?) 128 thread, 16 core device called Rainbow Falls. IBM is also producing the Power7 PowerPC-based 128 thread, 8 core device built into a 4-device module: Sun, IBM push multicore boundaries

It seems clear that multicore will be playing a key role in modern supercomputing. Dan Reid’s blog posting (reproduced in CACM) titled When Petascale is Just Too Slow has a bit worth quoting at the end:

I believe it is time for us to move from our deus ex machina model of explicitly managed resources to a fully distributed, asynchronous model that embraces component failure as a standard occurrence. To draw a biological analogy, we must reason about systemic, organism health and behavior rather than cellular signaling and death, and not allow cell death (component failure) to trigger organism death (system failure). Such a shift in world view has profound implications for how we structure the future of international high-performance computing research, academic-government-industrial collaborations and system procurements.

Perhaps the necessities of programming very (very) large systems may force some of the software issues currently hamstringing multicore.

Somehow I missed this one, too. Cilk is also now a part of Intel: Intel now has Cilk inside.