Call for papers for First Workshop on Software Tools for Multi-Core Systems held in conjunction with the IEEE/ACM International Symposium on Code Generation and Optimization (CGO), March 26, 2006 in Manhattan New York. The deadline for submission has been extended to Feb. 3.

In Good Ideas, Through the Looking Glass , Niklaus Wirth covers 50 years of good, bad and ugly (but mostly bad and ugly) ideas in computer architecture and languages. From the January IEEE Computer magazine. It goes from one’s complement binary representation through bubble memories (remmeber those?) to object oriented programming language issues. Available on line to IEEE Computer Society members.

New AMD CEO Phil Hester, formerly of IBM and Newisys discusses AMDs multicore architectures in the EE Times article New microarchitectures, from the ground up

An EE times article quotes iSuppli:

Market revenue and unit sales of multiprocessor chips are both going to increase fivefold in 2006 compared with 2005, according to market forecaster iSuppli Corp.

Just after Christmas, Cradle Technologies completed an $18M funding round. Their press release also announces the naming of a new CEO. Cradle Technologies makes multicore DSPs and is targetting video applications.

Four months after Hurricane Katrina, progress is still slow in Orleans Parish and much of the rest of the region. The information from locals in the New Orleans area often has a different emphasis than that of the national media. While there are many sites and blogs dedicated to various aspects of Katrina relief, I would like to point interested readers to three sites in particular that I have used to stay informed.

• WWL-TV – lots of good local New Orleans news.
• The New Orleans Mailing List (NOML) - an old mailing list filled with discussions by locals. Also available as a Yahoo Group.
• The Wet Bank Guide – a blog with a journalistic slant. Highly readable

A recent article in Embedded Systems Programming by Steve Lebison of Tensilica titled The End of Moore’s Law is about how modern SoCs are using an average of six processing cores per design, with at least one design exceeding 100 processing cores.

I enjoy the new ACM Queue magazine. Today I ran across this older article from the second issue. It is titled SoC: Software, Hardware, Nightmare, Bliss and covers many of the challenges to SoC (and MPSoCs), particularly software and tools. An interesting quote:

“Many chip companies have been dismayed at the number of software engineers required for a particular system. It is often more than double the number of chip designers required. “