The European IST Conference, coming in November in Helsinki, Finland has a Workshop and Networking Session called MPSOC-Armetis (A-MPSOC) dedicated to multiprocessor SoC research in Europe. There seems to be a high level of interest from the responses on the web pages.
Intel will be shipping its new quad core devices before the end of the year: Intel Plans Quad-Core Chip in Late 2006. Intel quotes a 70% performance boost over the dual core devices. They are also planning a 300% increase in performance per Watt over the next four years. This announcemement is big enough to have been picked up more by mainstream (non-technical) press such as ABC News.
The Multiprocessor Report has gotten a redesign! The major changes are the new URL, http://www.MultiprocessorReport.com/ and some new functionality. As the Multiprocessor Report has grown, better organization of postings and some new functions to help search and organize the postings has become necessary.  Each posting now has more information, including the date of the original posting. New search and organization functions permit display of items by day, month, category or keyword search. Any feedback on these changes is welcome.
StorLink Semiconductor has announced its family of Gemini dual core processors for networking. The dual ARM core devices target network storage (SL3512) , router gateways (SL3516) and set-top boxes (SL3518).
IntellaSys has announded their Scalable Embedded Array (SEA) processor array family. The first device, called the SEAforth-24, is aimed at embedded forth applications. Each of the 24 forth processor cores in the SEAforth-24 can operate are one billion instructions per second with a typical device power dissipation of 150 mW.
The Workshop on Design, Architecture and Simulation of Chip Multi-Processors (dasCMP) is being held on Sunday, December 10, 2006 in Orlando, FL as part of the 39th Annual International Symposium on Microarchitecture. The deadline for submissions is September 17, 2006.
According to the EE Times article ARCHITECTURES: Mindspeed rolls video processor IC, DSP cluster Mindspeed has introduced its 7th generation VoIP processing device. The Comcerto 900 series contains 18 processor cores, consisting of ARM general purprose processors and their Countach DSP cores.
EE Times continues its excellent coverage on multicore issues with Dave Bursky’s article: Multicore solutions proliferating
An interesting article from Embedded.com an Intel Staff Engineer on programming multicore processors: Development and Optimization Techniques for Multicore Processors
Ambric has given more details on its new architecture. While it has some reconfigurable computing and FPGA experts on their staff, the architecture seems decidely multiprocessor. It is interesting to compare this to to offering from picoChip.