EE Times reports on an AMD three core device: Odd move: AMD plans three-core CPU. It is likely that these devices will be standard four core devices with one defective core ignored. A similar approach was taken very many years ago when floating point coprocessors first went on-chip. Devices with faulty FPUs were sold (at a discount) as basic FPU-less fixed-point devices.
This first step toward defect tolerance may point to one of the real advantages to multicore: the ability to continue to increase performance via larger die size, without substantially decreasing yield. If done correctly, very large devices can be produced at very low cost using these techniques. This may be a key piece of technology that keeps Moore’s Law alive.